How to Improve a Power Supply Switch's Standby Efficiency
cut start
For the flyback power supply, the control chip is powered by the auxiliary winding after startup, and the voltage drop on the startup resistor is about 300V. Assuming that the starting resistance is 47kΩ, the power consumption is nearly 2W. To improve standby efficiency, this resistor channel must be cut off after start-up. TOPSWITCH, ICE2DS02G has a special start-up circuit inside, which can turn off the resistor after start-up. If the controller does not have a special start-up circuit, a capacitor can also be connected in series with the start-up resistor, and the loss after start-up can gradually drop to zero. The disadvantage is that the power supply cannot restart itself, and the circuit can only be started again after disconnecting the input voltage to discharge the capacitor.
reduce clock frequency
Clock frequency can be ramped down smoothly or abruptly. Smooth decline means that when the feedback exceeds a certain threshold, the clock frequency is linearly decreased through a specific module.
switch working mode
1. QR→pWM For switching power supplies working in high-frequency mode, switching to low-frequency mode during standby can reduce standby loss. For example, for a quasi-resonant switching power supply (working frequency of several hundred kHz to several MHz), it can be switched to a low-frequency pulse width modulation control mode pWM (tens of kHz) during standby. The IRIS40xx chip improves the standby efficiency by switching between QR and pWM. When the power supply is in light load and standby mode, the voltage of the auxiliary winding is small, Q1 is turned off, the resonance signal cannot be transmitted to the FB terminal, the FB voltage is lower than a threshold voltage inside the chip, and the quasi-resonance mode cannot be triggered, and the circuit works at a lower frequency PWM control mode.
2. pWM→pFM For switching power supplies that work in pWM mode at rated power, the standby efficiency can also be improved by switching to pFM mode, that is, fixing the on-time and adjusting the off-time. The lower the load, the longer the off-time and the higher the operating frequency. Low. Add the standby signal to its pW/ pin, under rated load conditions, the pin is high, the circuit works in pWM mode, when the load is below a certain threshold, the pin is pulled low , the circuit operates in pFM mode. Realizing the switching between pWM and pFM also improves the power supply efficiency during light load and standby state. By reducing the clock frequency and switching the working mode, the standby operating frequency can be reduced, the standby efficiency can be improved, the controller can be kept running, and the output can be properly regulated in the whole load range. Responds quickly even when the load surges from zero to full load and vice versa. The output voltage drop and overshoot values are kept within the allowable range.
Controllable Pulse Mode
The controllable pulse mode, also known as skip cycle control mode, refers to that when it is under light load or standby condition, a certain link of the circuit is controlled by a signal with a period larger than the clock period of the PWM controller, so that the output pulse of the PWM is periodically effective. Or failure, so that the efficiency of light load and standby can be improved by reducing the number of switches and increasing the duty cycle at a constant frequency. This signal can be added to the feedback channel, the pWM signal output channel, and the enable pin of the pWM chip.
