The basic principle of switching power supply is to use PWM square wave to drive power MOS tube
As a power supply research and development engineer, naturally I often deal with various chips. Some engineers may not know the inside of the chip very well. Many students directly turn to the application page of the Datasheet when applying a new chip, and build the peripheral according to the recommended design. done. In this way, even if there is no problem with the application, more technical details are ignored, and no better experience has been accumulated for its own technical growth.
1. Reference voltage
Similar to the reference power supply of board-level circuit design, the internal reference voltage of the chip provides a stable reference voltage for other circuits of the chip. This reference voltage requires high precision, good stability, and small temperature drift. The reference voltage inside the chip is also called the bandgap reference voltage, because this voltage value is similar to the bandgap voltage of silicon, so it is called the bandgap reference. This value is about 1.2V, a structure as shown in the figure below:

Here we will go back to the textbook to talk about the formula, the current and voltage formula of the PN junction:
It can be seen that it is an exponential relationship, and Is is the reverse saturation leakage current (that is, the leakage current caused by the minority carrier drift of the PN junction). This current is proportional to the area of the PN junction! That is, Is->S.
In this way, Vbe=VT*ln(Ic/Is) can be deduced!
Going back to the above figure, VX=VY is analyzed by the op amp, then it is I1*R1+Vbe1=Vbe2, so we can get: I1=△Vbe/R1, and because the gate voltages of M3 and M4 are the same, the current I1=I2 , so the formula is derived: I1=I2=VT*ln (N/R1) N is the ratio of the PN junction area of Q1 Q2!
Going back to the above figure, VX=VY is analyzed by the op amp, then it is I1*R1+Vbe1=Vbe2, so we can get: I1=△Vbe/R1, and because the gate voltages of M3 and M4 are the same, the current I1=I2 , so the formula is derived: I1=I2=VT*ln (N/R1) N is the ratio of the PN junction area of Q1 Q2!
In this way, we finally get the benchmark Vref=I2*R2+Vbe2, the key point: I1 has a positive temperature coefficient, and Vbe has a negative temperature coefficient, and then adjust it through the N value, but it can achieve very good temperature compensation! to get a stable reference voltage. N is generally designed according to 8 in the industry. If you want to achieve zero temperature coefficient, calculate Vref=Vbe2+17.2*VT according to the formula, so it is about 1.2V. There are problems such as power supply ripple suppression PSRR, which are limited to the level and cannot be deepened. The final sketch is like this, and the design of the op amp is of course very particular:
