Method for standby efficiency improvement of switch mode power supplies
cut off start
For the flyback power supply, the control chip is powered by the auxiliary winding after startup, and the voltage drop across the startup resistor is about 300V. Assuming that the value of the startup resistor is 47kΩ, the power consumption is nearly 2W. To improve standby efficiency, this resistor channel must be cut off after startup. TopSWITCH, ICE2DS02G has a special startup circuit inside, which can turn off the resistor after startup. If the controller does not have a dedicated starting circuit, a capacitor can also be connected in series with the starting resistor, and the loss after starting can gradually drop to zero. The disadvantage is that the power supply cannot restart itself. The circuit can only be started again after the input voltage is disconnected and the capacitor is discharged.
Reduce clock frequency
Clock frequency can drop smoothly or suddenly. Smooth decline means that when the feedback amount exceeds a certain threshold, a linear decrease in clock frequency is achieved through a specific module.
Switch working mode
1. QR→pWM For switching power supplies operating in high-frequency operating mode, switching to low-frequency operating mode during standby can reduce standby losses. For example, for a quasi-resonant switching power supply (operating frequency is several hundred kHz to several MHz), it can be switched to the low-frequency pulse width modulation control mode pWM (tens of kHz) during standby. The IRIS40xx chip improves standby efficiency through QR and pWM switching. When the power supply is at light load and standby, the auxiliary winding voltage is small, Q1 is turned off, and the resonant signal cannot be transmitted to the FB terminal. The FB voltage is less than a threshold voltage inside the chip, and the quasi-resonant mode cannot be triggered, and the circuit operates at a lower frequency. Pulse width modulation control mode.
2. pWM→pFM For switching power supplies operating in pWM mode at rated power, the standby efficiency can also be improved by switching to pFM mode, that is, fixing the turn-on time and adjusting the turn-off time. The lower the load, the longer the turn-off time, and the higher the operating frequency. Low. Add the standby signal to its pW/ pin. Under rated load conditions, this pin is high level, and the circuit works in pWM mode. When the load is lower than a certain threshold, this pin is pulled to low level. , the circuit works in pFM mode. Realizing switching between pWM and pFM improves the power efficiency during light load and standby states. By reducing the clock frequency and switching operating modes, the standby operating frequency is reduced and the standby efficiency is improved. The controller can be kept running and the output can be properly adjusted throughout the entire load range. Ability to respond quickly even when load surges from zero to full load and vice versa. The output voltage drop and overshoot values are kept within the allowable range.
Controlled pulse mode
(BurstMode) controlled pulse mode, also known as skip cycle control mode (SkipCycleMode), means that when it is under light load or standby conditions, a signal with a cycle larger than the pWM controller clock cycle controls a certain link of the circuit, making the pWM The output pulse is periodically valid or invalid, so that the efficiency of light load and standby can be improved by reducing the number of switches and increasing the duty cycle at a constant frequency. This signal can be added to the feedback channel, pWM signal output channel, the enable pin of the pWM chip (such as LM2618, L6565) or the internal module of the chip (such as NCp1200, FSD200, L6565 and TinySwitch series chips).
