Methods to Improve the Standby Efficiency of Switching Power Supplies
Cut off start
For the flyback power supply, the control chip is powered by the auxiliary winding after startup, and the voltage drop on the startup resistor is about 300V. Set the starting resistance value to 47k Ω and consume nearly 2W of power. To improve standby efficiency, the resistance channel must be cut off after startup. TOPSWITCH, ICE2DS02G has a dedicated starting circuit inside, which can turn off the resistor after starting. If the controller does not have a dedicated starting circuit, capacitors can also be connected in series with the starting resistor, and the loss after starting can gradually decrease to zero. The disadvantage is that the power supply cannot restart itself, and the circuit can only be restarted after disconnecting the input voltage and discharging the capacitor.
Reduce clock frequency
The clock frequency can smoothly decrease or suddenly decrease. Smooth descent refers to the linear decrease in clock frequency achieved through a specific module when the feedback exceeds a certain threshold.
Switch working mode
1. QR → pWM For switching power supplies operating in high-frequency mode, switching to low-frequency mode during standby can reduce standby loss. For example, for a quasi resonant switching power supply (operating frequencies ranging from a few hundred kHz to a few MHz), it can be switched to the low-frequency pulse width modulation control mode pWM (tens of kHz) during standby. The IRIS40xx chip improves standby efficiency by switching between QR and pWM. When the power supply is under light load and standby, the auxiliary winding voltage is low, Q1 is turned off, and the resonance signal cannot be transmitted to the FB terminal. The FB voltage is less than a threshold voltage inside the chip, which cannot trigger the quasi resonance mode. The circuit operates in a lower frequency pulse width modulation control mode. 2. pWM → pFM For switching power supplies that operate in pWM mode at rated power, standby efficiency can also be improved by switching to pFM mode, which fixes the on time and adjusts the off time. The lower the load, the longer the off time, and the lower the operating frequency. Add the standby signal to its pW/pin. Under rated load conditions, this pin is high and the circuit operates in pWM mode. When the load falls below a certain threshold, this pin is pulled low and the circuit operates in pFM mode. By switching between pWM and pFM, the power efficiency during light load and standby modes is improved. By reducing the clock frequency and switching working modes, the standby working frequency can be reduced, and the standby efficiency can be improved. The controller can be kept in operation and the output can be properly adjusted throughout the entire load range. Even when the load surges from zero to full load, it can react quickly, and vice versa. The output voltage drop and overshoot values are maintained within the allowable range.
Controllable pulse mode
(BurstMode) Controllable pulse mode, also known as SkipCycleMode, refers to a signal with a cycle longer than the clock cycle of the pWM controller that controls a certain part of the circuit when under light load or standby conditions, making the output pulse of the pWM periodically effective or ineffective. This can achieve constant frequency by reducing the number of switches and increasing the duty cycle to improve the efficiency of light load and standby. This signal can be added to the feedback channel, pWM signal output channel, enabling pins of the pWM chip (such as LM2618, L6565), or internal modules of the chip (such as NCp1200, FSD200, L6565, and TinySwitch series chips).
